Title:
信号処理装置
Document Type and Number:
Japanese Patent JP5103606
Kind Code:
B2
Abstract:
It is intended to expand the bit number of information signals and to prevent the information at that time from degradation. For this intention, a signal from an input terminal (1) is fed through predetermined delay means (2) to a variable filter (3), and is then fed through an arbitrary low-pass filter (4) to operation means (5), and its difference from the output of the variable filter (3) is calculated and fed to coefficient correction means (6). The coefficient determined by the coefficient correction means (6) is fed to the variable filter (3). Moreover, the signal from the input terminal (1) is fed through predetermined delay means (7) and a less significant bit addition circuit (8) to operation means (9), and its difference from the output of the variable filter (3) is calculated. This difference is added through a weighting circuit (10) to the output of an addition circuit (11), and is extracted from an output terminal (12). Moreover, the difference from the operation means (9) is fed through a peak detection circuit (13) and a low-pass filter (14) to a limiter circuit (15), and the signal corresponding to the less significant value is deleted so that the weighting at the weighting circuit (10) is performed.
Inventors:
Yasushi Sato
Application Number:
JP2005360789A
Publication Date:
December 19, 2012
Filing Date:
December 14, 2005
Export Citation:
Assignee:
Kyushu Institute of Technology
International Classes:
H03H17/02; G10L19/00; H03H17/06
Attorney, Agent or Firm:
Shinto International Patent Office