To obtain high processing results with a small-scale circuit configuration by providing a 1st signal processing circuit and a 2nd signal processing circuit which performs 2nd signal processing by using the results of 1st signal processing, feedbacks the results of the 2nd signal processing and performs 3rd signal processing in the case respective 2nd and 3rd signal processing can be performed in a shorter time than the 1st signal processing.

A LIP circuit 52 performs an operation of four-point neighborhood interpolation processing within one clock cycle about a pixel being an operation object, generates interpolation data S52 and outputs it to a LIP circuit 54. A LIP circuit 53 performs an operation of four-point neighborhood interpolation processing within one clock cycle about the pixel being an operation object, generates interpolation data S53 and outputs it to the LIP circuit 54. The circuit 54 uses the data S52 and S53 from the circuits 52 and 53, performs an operation of four-point neighborhood interpolation processing within one clock cycle, generates four-point neighborhood interpolation data Cpixel0 and outputs it to a LIP/texture function circuit 55.