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Title:
SIGNAL READOUT DEVICE
Document Type and Number:
Japanese Patent JPH03135177
Kind Code:
A
Abstract:

PURPOSE: To obtain a video signal with a broad band and high picture quality by extracting a clock frequency component from a signal output and feeding back a DC level proportional to the amplitude of leakage clock to a correlation duplicate sampling circuit.

CONSTITUTION: A clock frequency is extracted at a BPF 1 from an output signal at an output point P1 of a correlation duplicate sampling circuit, the leakage component is subject to synchronization detection by a synchronization detection circuit 2 and a DC voltage proportional to the amplitude is converted. The voltage is given to a gate circuit 3, a signal is extracted by using a gate pulse GP, the signal is compared with a reference voltage Vf at a differential amplifier 4 and a comparison output is given to a loop filter 5, and the output is used as a reference voltage of a clamp circuit 42 and a negative feedback circuit is constituted as a whole. In the negative feedback circuit, the voltage Vf is set to an earth level and the converged value is controlled so that an output level of the circuit 2 is zero, that is, the clock frequency at a point P1 is controlled to be zero. Thus, the video signal with an excellent phase characteristic is obtained and a sufficiently wide band output signal is obtained.


Inventors:
TAKAHASHI KENJI
AKIYAMA TOSHIYUKI
MIMURA ITARU
OZAWA NAOKI
MATSUMOTO TAKAHIRO
Application Number:
JP27159489A
Publication Date:
June 10, 1991
Filing Date:
October 20, 1989
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04N5/335; H04N5/341; H04N5/357; H04N5/363; H04N5/369; H04N5/372; H04N5/378; (IPC1-7): H04N5/335
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
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