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Title:
SIGNAL SEPARATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5652970
Kind Code:
A
Abstract:

PURPOSE: To reduce generation of drop-out of a data component due to variation of a DC level, by varying the reference voltage of the comparator which separates a data component and a synchronous signal, respectively, by means of following the peak level of the synchronous signal.

CONSTITUTION: A PCM signal is amplified by the amplifier 1, and is applied to the comparators 2 and 3. On the other hand, a level of the PCM signal is detected by the peak detection circuit 4, the level of the PCM signal and the output voltage of two constant-voltage regulated power supplies of the setting circuit 6 are super-posed and applied as the reference voltage of the comparators 2 and 3, respectively, and the data component and the synchronous signal are separated and obtained by the output terminals of the comparators 2 and 3, respectively.


Inventors:
KOBAYASHI TASUKU
Application Number:
JP12868279A
Publication Date:
May 12, 1981
Filing Date:
October 05, 1979
Export Citation:
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Assignee:
KENWOOD CORP
International Classes:
H04N5/08; H04N5/91; (IPC1-7): H04N5/08



 
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