PURPOSE: To obtain a stably operating means for 1.5 clock-cycle transfer by making a transmission-side latch dual and operating latches alternately in a two- fold clock cycle and providing dual relaying latches corresponding to transmission-side latches in the reception side.

CONSTITUTION: Transmission latches X0 and X2 latch an input signal A by lines T0 and T2. Relaying latched Y0 and Y2 latch delay signals on lines B0 and B2 by lines E0 and E2. A reception latch Z latches the signal of OR between outputs C0 and C2 of relaying latches. A latch U generates clocks of relaying latches Y0 and Y2 and is set by a signal on the line T2 and is reset by a signal on the line T0. Signals on lines E0 and E2 are outputs having polarities opposite to each other. Thus, relaying latches are held in a section, where there is a probability that signal is propagated by a minimum delay, to prevent the malfunction due to the minimum delay.