PURPOSE: To block the operation of a signal reception relay if a transient voltage is induced on a display line by connecting the signal reception relay and a capacitor in parallel, connecting a resistor in series with the said parallel circuit and providing a resistor io parallel with the signal reception relay, the parallel capacitor and the series resistance circuit.

CONSTITUTION: If an unbalanced current I flows to a 3-phase power line 9 installed in parallel with a display line 2, a transient voltage V is insudec onto cores 10, 11 of the display line 2. The transient voltage V is distributed onto a stray capacitance C1 distributed between the display line 2 and the sheath 12 of the line 2, a stray capacitance C2 between a negative (N) bus and ground E of the signal reception relay 3, a parallel circuit comprising the signal reception relay 3 and the capacitor 4 and a series resistor 5. Since the impedance of the capacitor 4 in the parallel impedance of the signal reception relay 3 and the capacitor 4 is very small to the transient voltage, the transient voltage distributed on the circuit is very small in comparison with the operation voltage of the relay 3. Even if a transient voltage is induced on the display line, since the voltage distributed to the relay is sufficiently made smaller than the operating voltage of the relay, the malfunction of the signal relay is prevented.