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Patent Searching and Data


Title:
SIGNAL TRANSMITTING CIRCUIT
Document Type and Number:
Japanese Patent JPS5860332
Kind Code:
A
Abstract:

PURPOSE: To simplify a bus driving circuit and to reduce the number of constitutional elements by using two transistors (TRs) for a reading circuit and one TR for a spare charging circuit in each bus line to constitute said driving circuit.

CONSTITUTION: Since a control signal p is "0" during the period when a bus line D0 is "1", a TR Tr3 is closed. When a control signal C1 is "0" and a TR Tr2 is opened, the bus line D0 becomes Vcc potential (1). Since the signal p is "1" during the succeeding reading period, the Tr3 is opened and the control signal C1 is turned to "1", closing the Tr2. At that time an inverse signal of an input signal I00 to be applied to the gate of a TR Tr1 is "1", so that the Tr1 is also closed, the line D0 charged up to Vcc potential in the preceeding period is discharged down to GND potential through TRs Tr1, Tr2 and an input signal 0 is transmitted. The succeeding period turns the line D0 to "1" and, during the succeeding reading period, the Tr1 is opened because the signal I00 is "1" and the line D0 is kept "1". Thus a small number of TRs make it possible to constitute a driving circuit having a high impedance function.


Inventors:
HAYASHI YUTAKA
Application Number:
JP15993281A
Publication Date:
April 09, 1983
Filing Date:
October 07, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F13/00; G06F13/40; (IPC1-7): G06F3/00; H04L11/00
Attorney, Agent or Firm:
Uchihara Shin