Title:
SIGNAL TRANSMITTER/RECEIVER FOR WIRING SYSTEM
Document Type and Number:
Japanese Patent JP3018169
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a wiring area by converting combinations with respect to changes in input signals received from a function block via lots of internal signal wires into a coded signal, outputting the converted signal to one signal transmission line and decoding the received code signal into lots of substantial input signals so as to send lots of signals simultaneously through one signal transmission line.
SOLUTION: The signal transmitter/receiver is made up of a drive circuit 1, a signal transmission line 2 and a reception circuit 3. Signals Si(1)-Si(N) are signals of different kinds which are sent to other function block via internal signal lines L1(1)-Li(N). The drive circuit 1 receives the signals Si(1)-Si(N) via lots of the internal signal lines L1(1)-Li(N) of one function block and codes the input signals to provide an output of the signal coded via the signal transmission line 2. The reception circuit 3 decodes the coded signal.
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Inventors:
Oh Kyung Gwang
Application Number:
JP12727198A
Publication Date:
March 13, 2000
Filing Date:
May 11, 1998
Export Citation:
Assignee:
Ergi Semicon Company Limited
International Classes:
G06F3/00; G11C5/12; H03K19/0175; H03K19/20; H03M5/20; H04J7/00; H04L25/34; H04L25/49; H04L27/00; (IPC1-7): H04L25/49; H03M5/20
Domestic Patent References:
JP1279621A | ||||
JP5136744A | ||||
JP2194752A | ||||
JP10145343A | ||||
JP5336174A | ||||
JP9130433A | ||||
JP1125682A | ||||
JP823356A |
Attorney, Agent or Firm:
Masaki Yamakawa