Title:
SILICON SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING SAME
Document Type and Number:
Japanese Patent JPS5546600
Kind Code:
A
Abstract:
The device consists of a ceramic substrate on which a first crystalline Si layer (I) with large grain size is formed by contact with molten Si; and later (I) is covered by an epitaxial layer (II) of crystalline Si with large grain size. The pref. substrate is not normally wet by molten Si, and is therefore coated with a carbon layer so it can be wet by the molten Si. Layer (I) is pref. more strongly droped than layer (II) so it has a lower resistance and forms a conducting intermediate layer under layer (II) and the substrate pref. possesses through holes or slots. Efficiency of the cell is improved.
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Inventors:
JIYOSEFU DEII HIIPUSU
OBAATO ENU TAFUTO
JIEI DEIBITSUDO ZUUKU
OBAATO ENU TAFUTO
JIEI DEIBITSUDO ZUUKU
Application Number:
JP12744879A
Publication Date:
April 01, 1980
Filing Date:
September 29, 1979
Export Citation:
Assignee:
HONEYWELL INC
International Classes:
H01L31/04; C30B25/02; C30B25/18; H01L21/86; H01L31/0224; H01L31/0368; H01L31/0392; (IPC1-7): H01L21/20; H01L31/04