Title:
シリコンウェーハ製造方法
Document Type and Number:
Japanese Patent JP7138432
Kind Code:
B2
Abstract:
To provide a manufacturing method of a silicon wafer capable of reducing surface roughness (haze) and surface defects (LPD) of a polished silicon wafer.SOLUTION: A manufacturing method of a silicon wafer according to an embodiment includes (1) a step of polishing the surface of a silicon wafer to be polished by using a polishing composition A, (2) a step of immersing the silicon wafer obtained in the step (1) in a liquid composition B including an anionic surfactant (component b1), and (3) a step of cleaning the silicon wafer obtained in the step (2) by using a cleaning composition C. However, the polishing composition A and the cleaning composition C do not substantially include the component b1.SELECTED DRAWING: None
Inventors:
Katsuaki Toda
Application Number:
JP2017249642A
Publication Date:
September 16, 2022
Filing Date:
December 26, 2017
Export Citation:
Assignee:
Kao Corporation
International Classes:
H01L21/304; B24B37/00; C09K3/14; C11D1/02
Domestic Patent References:
| JP11243073A | ||||
| JP2005294282A | ||||
| JP2007048918A |
Foreign References:
| WO2001071788A1 |
Attorney, Agent or Firm:
Patent business corporation Ikeuchi and Partners
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