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Title:
SIMULATOR EQUIPMENT
Document Type and Number:
Japanese Patent JPH0378076
Kind Code:
A
Abstract:

PURPOSE: To efficiently execute simulation for various controllers each different in efficiency by respectively setting arithmetic processing to be executed for the controller subject to inspection while dividing the processing into plural arithmetic processing means.

CONSTITUTION: For the processors 21 to which arithmetic programs are allocated, a host processor 11 selects the processor 21 to be operated corresponding to a controller 2 as the object of the simulation. Then, only the selected processor 21 is operated and signal processing is executed for each processor 21 while mutually executing communication. Afterwards, a pseudo signal is generated and outputted to the controller 2. The controller 2 executes the arithmetic processing based on the pseudo signal and outputs a control signal and in the host processor 11, the control signal is analyzed and inspected. Accordingly, the simulation can be efficiently executed to the various controllers 2 each different in efficiency by one simulator 1.


Inventors:
HASHIMOTO YOSHIKAZU
HAYASHI KUNIHISA
TADA TETSUYA
Application Number:
JP21539089A
Publication Date:
April 03, 1991
Filing Date:
August 21, 1989
Export Citation:
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Assignee:
FUJITSU TEN LTD
TOYOTA MOTOR CORP
International Classes:
B60T8/17; B60T8/00; B60T8/172; B60T8/88; G05B23/02; G06F19/00; (IPC1-7): B60T8/00; B60T8/88; G05B23/02; G06F15/20
Domestic Patent References:
JPS63157072A1988-06-30
Attorney, Agent or Firm:
Nishikyo Keiichiro (1 outside)