PURPOSE: To inform the information of the occurrence of a single bit error to the outside when necessary by means of the signal which decides whether or not the above-mentioned information should be informed to the outside.

CONSTITUTION: In case the information on a single error is required for an inspection of a main storage, a set signal is transmitted and set to an S-R type flip flop circuit 33 from a CPU. As a result, an AND gate 34 is capable of delivering an output, and the single error information to be fed to an error correcting circuit 32 is trnamitted to the CPU from a readout information inspecting circuit 31 via an AND gate 34 and an OR gate 35. On the other hand, the circuit 33 is reset in the normal operation mode. As a result, the gate 34 is incapable of delivering an output, and the error information is not sent to the CPU but processed within a single error correcting and double error detecting circuit.