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Title:
低電力SDARS受信機用の単一経路アーキテクチャおよび自動利得制御(AGC)アルゴリズム
Document Type and Number:
Japanese Patent JP5078301
Kind Code:
B2
Abstract:
An automatic gain control (AGC) for use in a digital radio receiver that allows at least two types of input signal to be processed using a single receiver front end by supporting two modes of operation, each optimized for one particular signal type, and a third mode not optimized for either. The AGC enables smooth switching between the optimized modes of operation via the non-optimized mode. By measuring a difference in the strength between the demodulated signals, and comparing that to two preset values, the AGC which mode of operation to place the receiver in. Modes of operation are maintained by adjusting the gain of a variable gain amplifier (VGA), so that an appropriate incoming signal is amplified to a level that is suitable for an analogue-to-digital (ADC) converter. The AGC is compatible with existing satellite digital audio radio system (SDARS) transmission capabilities.

Inventors:
Robert marchemes
Dennis Orlando
Gee Song
Eric Zong
Application Number:
JP2006221864A
Publication Date:
November 21, 2012
Filing Date:
August 16, 2006
Export Citation:
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Assignee:
Agia Systems Incorporated
International Classes:
H04B1/16; H03G3/20; H03G3/30; H04H40/90; H04J3/00; H04J11/00; H04H1/00
Domestic Patent References:
JP2005278122A
JP2001237782A
Foreign References:
WO2006116140A1
Attorney, Agent or Firm:
Okabe
Masao Okabe
Nobuaki Kato
Shinichi Usui
Takao Ochi
Teruhisa Motomiya
Asahi Shinmitsu
Katsumi Miyama



 
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