Title:
SINGLE STABILIZED MULTIPLE CIRCUIT
Document Type and Number:
Japanese Patent JPS5232654
Kind Code:
A
Abstract:
PURPOSE: The reset signal to be applied to one transistor base of FF circuit of set/reset type is made to fall suddenly, so that the jitter may not appear to output pulse even at the time of fluctuation of power source voltage or temperature.
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Inventors:
MOCHIDA YUUKOU
OGAWA TADAO
YAMAGUCHI KAZUO
OGAWA TADAO
YAMAGUCHI KAZUO
Application Number:
JP10848475A
Publication Date:
March 12, 1977
Filing Date:
September 09, 1975
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H03K3/284; H03K3/02; H03K3/0232; (IPC1-7): H03K3/02
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