Title:
SNUBBER CIRCUIT
Document Type and Number:
Japanese Patent JP3451419
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To suppress surge voltage and reduce a switching loss, by controlling a circuit so that, when a main switch is turned on, a synchronous rectifying switch may be turned off, and when the main switch is turned off, discharge current may be caused to flow in a capacitor for snubber and, after a specified delay time, the synchronous rectifying switch may be turned off.
SOLUTION: By means of a control circuit 1, a synchronous rectifying switch SW2 is turned off when a main switch SW1 is turned on and, when the main switch SW1 is turned off, discharge current is caused to flow in a capacitor C3 for snubber and, after current is caused to flow in a diode D2 using a delay circuit, the synchronous rectifying switch SW2 is turned off in a zero voltage state. By this method, a switching operation can be conducted in a zero voltage state, thereby reducing a switching loss and absorbing surge voltage by the capacitor C3 for snubber.
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Inventors:
Toshimitsu Sato
Hisao Shimizu
Hisao Shimizu
Application Number:
JP20320997A
Publication Date:
September 29, 2003
Filing Date:
July 29, 1997
Export Citation:
Assignee:
Fujitsu Access Limited
International Classes:
H02M3/155; H02M1/08; H02M3/28; (IPC1-7): H02M3/28; H02M1/08; H02M3/155; H02M3/28
Domestic Patent References:
| JP442776A | ||||
| JP8168239A | ||||
| JP6311743A |
Attorney, Agent or Firm:
Kiyoshi Manabe (3 people outside)
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