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Title:
SOFTWARE ABNORMALITY DETECTION SYSTEM
Document Type and Number:
Japanese Patent JP2007018332
Kind Code:
A
Abstract:

To provide a software abnormality detection system capable of performing debugging processing during off-line by separating the debugging processing from on-line processing in processor engines in the debugging processing due to software abnormality in the processor engines.

The software abnormality detection system 30 is provided with a processor engine group 31 in which a plurality of processor engines for software processing are mutually connected in parallel, and an interface 32 for inputting added individual abnormality detection data (bn) generated by processing input data (a) to the processor engine group 31 by the processor engine group 31 and then storing the inputted data (bn). From the processor engine group 31, the added individual abnormality detection data (bn) are outputted in a process for successively operating the input data (a) from the initial processor engine up to the final processor engine PE1 to PEn. The interface 32 is provided with a data memory 32a for storing the added individual abnormality detection data (bn) so as to be readable.


Inventors:
NAKADA AKIYOSHI
Application Number:
JP2005200061A
Publication Date:
January 25, 2007
Filing Date:
July 08, 2005
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F11/28; G06F11/32
Attorney, Agent or Firm:
Hisashi Hatano
Shunguchi Sekiguchi
Akio Saruwatari
Junichi Furukawa