Title:
物理レイヤ処理において使用するためのソフトウェアパラメータ化可能な制御ブロック
Document Type and Number:
Japanese Patent JP2005522963
Kind Code:
A
Abstract:
A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (305,307), a composite channel processing block (303,309) and a chip rate processing block (301,311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.
Inventors:
Edward El. Hepler
Michael F. Star Scenic
David S. Base
Vinish Desai
Alan M. Levi
George W. McClellan
Douglas Earl Custer
Michael F. Star Scenic
David S. Base
Vinish Desai
Alan M. Levi
George W. McClellan
Douglas Earl Custer
Application Number:
JP2003586688A
Publication Date:
July 28, 2005
Filing Date:
April 15, 2003
Export Citation:
Assignee:
InterDigital Technology Corporation
International Classes:
H04J1/00; H04B1/40; H04B1/707; H04B7/26; H04J3/00; H04J4/00; H04L1/08; H04L12/56; H04W74/02; H04L1/00; H04W28/18; H04W80/00; H04W88/02; (IPC1-7): H04J13/00; H04J1/00; H04J3/00
Attorney, Agent or Firm:
Yoshikazu Tani
Kazuo Abe
Kazuo Abe