Title:
SOLDERING INSPECTION METHOD
Document Type and Number:
Japanese Patent JP2004177224
Kind Code:
A
Abstract:
To provide a method which enables independent inspection of a product, and is moreover capable of easily performing soldering inspection of a semiconductor device put on a board in a short time, by confirming only a minimum number of addresses necessary for the soldering inspection.
This is a method of inspecting soldering of the semiconductor device mounted on the printed board, using an arithmetic circuit of a device on which the semiconductor device has been mounted. A CPU is used for inspecting the soldering of the semiconductor device.
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Inventors:
Inada, Takashi
Application Number:
JP2002000342646
Publication Date:
June 24, 2004
Filing Date:
November 26, 2002
Export Citation:
Assignee:
NEC SAITAMA LTD
International Classes:
G01R31/02; B23K1/00; G01R31/28; H05K3/34; G01R31/02; B23K1/00; G01R31/28; H05K3/34; (IPC1-7): G01R31/28; G01R31/02; H05K3/34
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