Title:
固体故障電流リミッタ
Document Type and Number:
Japanese Patent JP6412198
Kind Code:
B2
Abstract:
A solid-state fault current limiter including a current splitting reactor, comprising a system current input, a passive current output and a control current output. A voltage control reactor includes a first end and a second end, the first end coupled to the control current output and the second end coupled to the passive current output. A fault current trigger circuit coupled in parallel with the voltage control reactor and configured to open when a fault current, received by the system current input, exceeds a predefined trigger current. A transient voltage control circuit coupled in parallel with the voltage control reactor to receive the fault current.
Inventors:
Kasen Dee Techlet Sadiku
Charles El Stanley
Seman Farsan
Piotr Rubiki
Charles El Stanley
Seman Farsan
Piotr Rubiki
Application Number:
JP2017076052A
Publication Date:
October 24, 2018
Filing Date:
April 06, 2017
Export Citation:
Assignee:
Varian Semiconductor Equipment Associates, Inc.
International Classes:
H02H9/02
Domestic Patent References:
| JP4112619A | ||||
| JP50066130U | ||||
| JP60074932A | ||||
| JP2006197667A | ||||
| JP2013503600A | ||||
| JP2010537620A |
Foreign References:
| US20120264613 |
Attorney, Agent or Firm:
Kenji Sugimura
Masaaki Ishikawa
Masaaki Ishikawa
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