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Title:
SOLID STAGE IMAGE PICKUP ELEMENT
Document Type and Number:
Japanese Patent JPS5933865
Kind Code:
A
Abstract:

PURPOSE: To obtain a solid stage image pickup element which can improve dynamic range, reduce a dark current, improve a blooming suppression rate and reduce the size of pixels by increasing the signal storage capacity of a vertical CCD shift register which gives the upper limit in the storage charge amount.

CONSTITUTION: A low density diffused layer 7 for buried channel is of reverse conductive type (e.g., P type) to a semiconductor substrate 6 of the first conductive type (e.g., N type), and increased in the density of impurity as compared with the substrate 6. CCD electrodes 8, 9 are formed of polycrystalline silicon of the first layer and the polycrystalline silicon of the second layer which is slightly superposed with the first layer. An impurity layer of the first conductive type is formed on the surface 11 of the semiconductor under the polycrystalline silicon electrode 9 of the second layer so as to provide a difference from the surface potential formed under the first layer electrode. The diffusion depth Xch1 of a channel 7-1 forming a vertical CCD shift register is set shallower than the diffusion depth Xch2 of channel 7-2 forming a horizontal shift register. In this manner, the capacity of the CCD electrode and the maximum storage charge amount can be increased by twice as compared with the conventional element, thereby increasing the dynamic range.


Inventors:
KOIKE NORIO
TAKEMOTO KAYAO
MASUHARA TOSHIAKI
Application Number:
JP14320982A
Publication Date:
February 23, 1984
Filing Date:
August 20, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/339; H01L27/148; H01L29/762; H04N5/335; H04N5/341; H04N5/355; H04N5/359; H04N5/3725; H04N5/3728; (IPC1-7): H01L27/14; H01L29/76
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
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