Title:
固体撮像素子および電子機器
Document Type and Number:
Japanese Patent JP6589868
Kind Code:
B2
Abstract:
The present disclosure relates to a solid state image sensor and an electronic apparatus capable of performing a gain transition at high speed. A ramp generation circuit includes sample hold circuits and ramp generation DACs, the number of which depends on kinds of required gains (for example, two kinds, i.e. a low gain and a high gain). Then, the two sample hold circuits can individually hold gain DAC output voltages at the different gains. This enables a switch to the ramp generation DAC holding the required gain voltage by means of a ramp selection signal. The present disclosure can be applied, for example, to a CMOS solid state image sensor that is used for an imaging device.
Inventors:
Takahiro Abiru
Hisamatsu Yasuaki
Nagata Tadashi
Hisamatsu Yasuaki
Nagata Tadashi
Application Number:
JP2016543904A
Publication Date:
October 16, 2019
Filing Date:
August 06, 2015
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H04N5/378; H03M1/56; H04N5/374
Domestic Patent References:
| JP2014120860A | ||||
| JP2010288218A | ||||
| JP2010258736A | ||||
| JP2013229853A |
Attorney, Agent or Firm:
Takashi Nishikawa
Yoshio Inamoto
Yoshio Inamoto