Title:
固体撮像装置
Document Type and Number:
Japanese Patent JP4109743
Kind Code:
B2
Abstract:
The present invention provides a solid state image sensor constructed in such a manner that, even if the impurity concentration of the wells of a transistors is increased, the junction leakage current does not increase, and thus, the picture quality of the reproduced picture is not deteriorated. On a p-type substrate, there are formed a first p-type well for a photoelectric conversion portion comprising a photodiode, and a second p-type well for a signal scanning circuit portion. In the surface portions of the first and second p-type wells, a first and a second n-type diffused layers are formed, respectively. The drain of a reset transistor and the drain of an amplifying transistor which constitute the second n-type diffused layer are connected to a power supply line. Further, the source of an address transistor which is an n-type diffused layer is connected to a vertical signal line. The gates of the amplifying transistor and the address transistor are formed between second n-type diffused layers disposed at predetermined intervals on the surface of the second p-type well.
Inventors:
Hiroshi Yamashita
Hisanori Ihara
Ikuko Inoue
Tetsuya Yamaguchi
Hidetoshi Nozaki
Hisanori Ihara
Ikuko Inoue
Tetsuya Yamaguchi
Hidetoshi Nozaki
Application Number:
JP7080898A
Publication Date:
July 02, 2008
Filing Date:
March 19, 1998
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L27/146; H01L31/0352; H04N5/335; H04N5/361; H04N5/369; H04N5/374; H04N5/3745
Domestic Patent References:
JP9199703A | ||||
JP745809A | ||||
JP6269551A | ||||
JP124362A |
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Sadao Muramatsu
Ryo Hashimoto