To provide a solid-state imaging device wherein the circuit scale and the transfer time of a data transfer circuit can be reduced.
A column select circuit 5 outputs column selection signals related to specify the n columns (n≥2) of a pixel array 2 collectively and sequentially at predetermined time intervals. A sample hold signal conversion circuit group 4 is equipped with a plurality of data transfer circuits which transfer n bits every n columns (n≥2) of a pixel array in the digital data of a predetermined number of bits which is converted by each of a plurality of analog-to-digital converters according to the column selection signals by using one data line. A reference voltage drive circuit group 8 is provided in a one-to-one relationship with the data transfer circuit in the row direction and provided with a plurality of reference voltage drive circuits which drive 2n-1 common reference voltage lines individually according to the column selection signals. An image data receiving circuit 6 is equipped with a plurality of differential amplifier circuits to which the data line and the 2n-1 reference voltage lines are connected.