Title:
SOUND ECHO ELIMINATION DEVICE
Document Type and Number:
Japanese Patent JP3121998
Kind Code:
B2
Abstract:
PURPOSE: To provide a sound echo elimination device compatible with high speed and high stability in the adaptive processing using the least square method or the like.
CONSTITUTION: Areas of a pseudo impulse response register 9 are divided into N-blocks and a grow rate of average storage sum mean power of variable coefficients stored in an updated block division is used for an evaluation value to set variably the update step of the divided block and while the gain of coefficient update gain is subject to adaptive control, a coefficient correction arithmetic circuit 7 conducts arithmetic processing to suppress howling low.
Inventors:
Yoshimasa Kusano
Application Number:
JP29643294A
Publication Date:
January 09, 2001
Filing Date:
November 30, 1994
Export Citation:
Assignee:
Kyocera Corporation
International Classes:
H04M1/60; H04B3/23; (IPC1-7): H04B3/23; H04M1/60
Domestic Patent References:
| JP5145447A | ||||
| JP66266A |