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Patent Searching and Data


Title:
SOUND MUTING CIRCUIT
Document Type and Number:
Japanese Patent JPH08172320
Kind Code:
A
Abstract:

PURPOSE: To attain a sound muting circuit capable of operation at either time of power on or power off.

CONSTITUTION: The sound muting circuit consists of a 1st transistor(TR) 1 constituted of a PNP type TR capable of supplying power supply (5V) to its emitter through a diode, connecting a resistor 5 and a capacitor 6 connected in series between the emitter and the earth and outputting a mute signal or the like supplied to its base from its collector as an inverted mute signal or the like, a 2nd TR 2 constituted of an NPN type TR capable of executing switching operation for intermittently connecting a sound output to the earth, a 3rd TR 3 constituted of a PNP type TR for outputting a reset signal supplied to its base from its collector as an inverted reset signal, an amplifier 4 for amplifying a supplied sound signal and generating a sound output, the resistor 5, the capacitor 6, and the diode 7 connected from the power supply to the emitter of the 1st TR 1 in the forward direction.


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Inventors:
MURAMATSU YOSHIO
Application Number:
JP31736894A
Publication Date:
July 02, 1996
Filing Date:
December 20, 1994
Export Citation:
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Assignee:
FUJITSU GENERAL LTD
International Classes:
H03F1/00; H04N5/44; (IPC1-7): H03F1/00; H04N5/44