Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JP3132435
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve the reliability of a memory cell formed of a substrate plate-type trench capacitor and to facilitate the downsizing of such a memory cell.
SOLUTION: A semiconductor device is constructed, in such a manner that an insulating film 10 which is thicker than a capacitive insulating film 11 for a capacitor, is embedded into a region which is between source-drain diffusion layers 7 and 8 of a transfer gate transistor and an accumulated electrode 12 and which is the upper side wall of a trench 9 of a substrate plate-type trench capacitor. The transfer gate transistor belongs to a memory cell that is formed of the substrate plate type trench capacitor, and the accumulated electrode 12 is embedded into the trench 9. Then, a silicide layer 15 is formed in such a manner that the layers 7 and 8 are electrically connected to the electrode 12, or the layer 15 for electrically connecting the layers 7 and 8 to the electrode 12 is formed so as to bridge over the film 11, that has been formed on the embedded film 10 and on the side wall of the trench 9.
Inventors:
Koyo Togo
Application Number:
JP25699097A
Publication Date:
February 05, 2001
Filing Date:
September 22, 1997
Export Citation:
Assignee:
NEC
International Classes:
H01L21/28; H01L21/822; H01L21/8242; H01L27/04; H01L27/108; (IPC1-7): H01L27/04; H01L21/28; H01L21/822; H01L21/8242; H01L27/108
Domestic Patent References:
| JP888331A | ||||
| JP1243460A | ||||
| JP8246769A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)