Title:
SQUELCH CIRCUIT AND ITS METHOD
Document Type and Number:
Japanese Patent JP11041045
Kind Code:
A
Abstract:
To realize a small sized and inexpensive squelch circuit that surely mutes noise on a digital audio signal.
A received digital audio signal is given to a serial/parallel conversion circuit 11, from which a parallel signal output is obtained, and a subtractor 13 calculates a difference between this signal and a signal delayed at a shift register 12 by a prescribed time for each sample. Then an integration comparator 14 integrates an absolute value of an output of the subractor for a prescribed sampling number, and when the integrated value is smaller than a threshold level, a tri-state buffer 15 opens to provide an output of the digital audio signal only in this occasion.
Inventors:
Sekimukai, Kenichi
Suzuki, Masaru
Suzuki, Masaru
Application Number:
JP1997000192895
Publication Date:
February 12, 1999
Filing Date:
July 17, 1997
Export Citation:
Assignee:
KOKUSAI ELECTRIC CO LTD
International Classes:
H03G3/20; H03G3/30; H04B1/10; H03G3/20; H03G3/30; H04B1/10; (IPC1-7): H03G3/20; H03G3/30; H04B1/10