Title:
STACK CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS5474651
Kind Code:
A
Abstract:
PURPOSE: To enable high speed processing in a small sized computer, by providing the stack set performing the processing of shunt and restoration of various registers caused at program branch.
CONSTITUTION: The SLA 171 indicates the lower limit address at the stack area, SUA 172 is the upper limint address, CSP 173 is the control stack pointer representing the head address of the control stack, DSP 174 is the data stack pointer representing the head address of the data stack, and the size of the stack area is specified with SLA 171 and SUA 172, and the area of usage in arbitrary program is specified with SCP 173 and DSP 174.
Inventors:
MIKI YUUSAKU
YAMAMOTO HIDEMI
KIMIHIRA HIROICHI
TANAKA AKIO
YAMAMOTO HIDEMI
KIMIHIRA HIROICHI
TANAKA AKIO
Application Number:
JP14151577A
Publication Date:
June 14, 1979
Filing Date:
November 28, 1977
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F7/78; G06F9/42; G06F9/34; (IPC1-7): G06F9/12
Domestic Patent References:
| JPS52133739A | 1977-11-09 |