PURPOSE: To provide a stacked varistor which can prevent the deterioration of electric property by preventing the printing mis-registration of an inner electrode or the breakage of a ceramic layer while securing the minimum value of the grain boundary in the thickness direction of a ceramic layer.
CONSTITUTION: At least a pair of inner electrodes 5 are buried, to overlap each other with a ceramic layer 3 to materialize voltage nonlinear property between, inside a sintered substance 4 where a plurality of semiconductor ceramic layers are stacked, and only one end 5a of each inner electrode 5 is exposed alternately to both end faces 4a and 4b of the above sintered substance 4 so as to constitute a stacked varistor 1. In this case, the thickness of the functional ceramic layer 3 between the inner electrodes 5 is made less than 15μm, and the thickness of the residual ceramic layer 2 excluding the inner electrode is made 15μm or more. And, the inner electrode 5 is made on the surface of this residual ceramic layer 3.
NAKAYAMA AKIYOSHI
NAKAMURA KAZUYOSHI
YONEDA YASUNOBU
SAKABE YUKIO
