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Title:
STAGGERED THIN FILM TRANSISTOR AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH05326553
Kind Code:
A
Abstract:

PURPOSE: To eliminate a problem of an overhang and to obviate a step disconnection of a semiconductor layer to be laminated by extremely simple modifications of a structure and manufacturing steps.

CONSTITUTION: A source electrode 2S and a drain electrode 2D made of transparent conductive films opposed at a first gap at edges are formed on a transparent insulating board 1. Ohmic contact layers 3 set wider than the first gap are formed in the degree that a second gap to be generated at opposed edges do not cause step disconnection of a semiconductor layer 5 to be intruded into the second gap on the electrodes 2S and 2D to bury the first and second gaps in such a manner that both ends are laminated on both the layers 3 to form the layer 5 to operate as an active layer.


Inventors:
OGATA HIROSHI
YANAI KENICHI
TANAKA TSUTOMU
Application Number:
JP13230392A
Publication Date:
December 10, 1993
Filing Date:
May 25, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/78; H01L21/336; H01L29/786; (IPC1-7): H01L21/336; H01L29/784
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)



 
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