PURPOSE: To obtain a static type transfer gate sequential circuit capable of performing the same high speed operation as a dynamic type and coping with a low speed operation.

CONSTITUTION: The static type transfer gate sequential circuit has a transfer gate logic circuit TG, two inverters V1, V2, an input terminal D, an input terminal CC of a clock, an output terminal QQ, a power source voltage terminal VDD and a ground terminal GND grounding a circuit. The output terminal of the TG is connected with the input terminal of the V1, the output terminal of the V1 is connected with the input terminal of the output terminal of the V2 and the output terminal of V2 is connected with the output terminal of the TG, respectively, and the input terminal and the output terminal of the TG are connected with the input terminal D and the output terminal QQ.