Title:
STORAGE CONTROLLER
Document Type and Number:
Japanese Patent JP3505728
Kind Code:
B2
Abstract:
PURPOSE: To reduce the wait time of a memory reference request concerning the storage controller provided with a shared buffer inside so as to process the memory reference request sent from a single or plural instruction processors.
CONSTITUTION: This device is provided with an order guarantee judge part 39 for judging the passing processing of the following memory reference request sent from the same instruction processors 1 and 2 can be performed or not when memory reference requests 20 and 21 are kept waiting by the error of a shared buffer 8 or the like and when the prescribed memory reference order is guaranteed, the following memory reference request is processed first. A memory reference address contained in the memory reference request, the identifiers of the instruction processors 1 and 2, the kinds of memory reference requests and instruction order judge numbers are used for guaranteeing and judging the order.
Inventors:
Kyoko Kawamura
Hiroshi Kurokawa
Kazunori Kuriyama
Hiroshi Kurokawa
Kazunori Kuriyama
Application Number:
JP388293A
Publication Date:
March 15, 2004
Filing Date:
January 13, 1993
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
G06F12/02; G06F12/00; G06F12/08; G06F15/16; G06F15/177; (IPC1-7): G06F12/08; G06F12/00; G06F15/16
Domestic Patent References:
| JP56159886A | ||||
| JP5693163A | ||||
| JP2114342A | ||||
| JP5547545A | ||||
| JP6120153A | ||||
| JP61220047A | ||||
| JP5677967A | ||||
| JP219945A |
Attorney, Agent or Firm:
Yasuo Sakuta