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Title:
記憶装置
Document Type and Number:
Japanese Patent JP6433860
Kind Code:
B2
Abstract:
According to one embodiment, a memory device includes a first electrode, a second electrode, a first layer, and a second layer. The first electrode includes a first element. The first layer is provided between the first electrode and the second electrode. The first layer includes at least one of an insulator or a first semiconductor. The second layer is provided between the first layer and the second electrode. The second layer includes a first region and a second region. The second region is provided between the first region and the second electrode. The second region includes a second element. A standard electrode potential of the second element is lower than a standard electrode potential of the first element. A concentration of nitrogen in the first region is higher than a concentration of nitrogen in the second region.

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Inventors:
Marina Yamaguchi
Shosuke Fujii
Yuichi Kamimuta
Takayuki Ishikawa
Masumi Saito
Application Number:
JP2015156257A
Publication Date:
December 05, 2018
Filing Date:
August 06, 2015
Export Citation:
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Assignee:
Toshiba Memory Corporation
International Classes:
H01L21/8239; H01L27/105; H01L45/00; H01L49/00
Domestic Patent References:
JP2013125903A
Foreign References:
WO2010038423A1
Attorney, Agent or Firm:
Masahiko Hinataji