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Patent Searching and Data


Title:
STRUCTURE OF IC PACKAGE
Document Type and Number:
Japanese Patent JPS6113648
Kind Code:
A
Abstract:

PURPOSE: To obtain a package, which can observe the operation of an IC from the surface thereof and be connected electrically, by boring a window to a third insulating layer at a position corresponding to a radial pattern formed to a second insulating layer.

CONSTITUTION: A second ceramic layer having an IC chip housing window and radial conductive patterns 4 toward the outside from the periphery of the window and a third ceramic layer 7, in which the beginning terminals of the radial patterns 4 are exposed partially into the window and which has metallized sections 8 for fixing a seal ring in the periphery of a window hole and holes 12 in the vicinity of the outer circumference of a package in response to the patterns 4 for the ceramic layer 5 are superposed on a first ceramic layer 3 on which an IC chip loading section 2 is formed, and external connecting conductor patterns 6 reaching to the base of a laminate from each end terminal of the patterns 4 are shaped and sintered. An IC chip 1 is loaded and connected 10, and hermetically sealed by a cap 9. According to the constitution, a power supply and signals on a test can be fed and observed from the hole section, and can be tested easily.


Inventors:
HORINO NAOHARU
Application Number:
JP13323884A
Publication Date:
January 21, 1986
Filing Date:
June 29, 1984
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L23/04; H01L21/66; H01L23/02; (IPC1-7): H01L23/04
Attorney, Agent or Firm:
Shinnosuke Tsunoda