Title:
SUBSTRATE CARRIER
Document Type and Number:
Japanese Patent JP3399728
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the interference between a carry arm and a substrate by detecting the clearance in a vertical direction between the fellow substrate accommodated in a cassette, and inserting a carry arm between substrate while raising it along an oblique locus, in the case that the clearance is under the specified critical value.
SOLUTION: The clearance in a vertical direction between the fellow two sheets of wafers W1 and W2 stored in a cassette is detected with a substrate position detector, and in the case that the clearance by the detection is under the specified critical value, the substrate carry arm 5 is inserted in horizontal direction, with its bottom kept on the specified level from the bottom position of a wafer W1. The substrate carry arm 5 is shifted rectilinearly in oblique direction along the locus TR, from the position where the projection 5C reaches the under area of the front of the wafer W1. Hereby, the interference between the substrate carry arm 5 and each wafer W1 and W2 can be reduced.
Inventors:
Yoshiji Oka
Masayuki Itaba
Yoshimitsu Fukutomi
Toshiya Yuge
Masayuki Itaba
Yoshimitsu Fukutomi
Toshiya Yuge
Application Number:
JP32837795A
Publication Date:
April 21, 2003
Filing Date:
November 22, 1995
Export Citation:
Assignee:
Dainippon Screen Mfg. Co., Ltd.
International Classes:
G01B21/00; B25J13/08; B65G1/00; B65G49/07; H01L21/677; H01L21/68; (IPC1-7): H01L21/68; B25J13/08; B65G49/07
Domestic Patent References:
| JP6320504A | ||||
| JP5324060A | ||||
| JP5217082A | ||||
| JP5102286A | ||||
| JP63182535U |
Attorney, Agent or Firm:
Takao Igarashi (3 outside)