Title:
SUCCESSIVE APPROXIMATION A/D CONVERTER
Document Type and Number:
Japanese Patent JPH04274618
Kind Code:
A
Abstract:
PURPOSE: To improve the a prescribed capability of a microcomputer system by reducing the processing of the microcomputer with respect to an A/D converter in the microcomputer system employing the A/D converter.
CONSTITUTION: A successive approximation A/D converter control section 110 outputs a 10-bit data 150 and an upper limit setting register 107 and a lower limit setting register 108 output respectively data 151, 152. In this case, a multiplexer 106 is provided to select any of data 151, 152, 153 to an input of a D/A converter 104. When the multiplexer 106 selects the data 151 and 152, a comparison result signal 164 operates the control section 110.
Inventors:
SAWAI YASUNORI
Application Number:
JP5950091A
Publication Date:
September 30, 1992
Filing Date:
February 28, 1991
Export Citation:
Assignee:
NEC CORP
International Classes:
H03M1/12; H03M1/38; (IPC1-7): H03M1/12; H03M1/38
Domestic Patent References:
| JPH02148918A | 1990-06-07 | |||
| JPH04120676A | 1992-04-21 |
Attorney, Agent or Firm:
Masanori Fujimaki