Title:
SUPER-JUNCTION SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2023135674
Kind Code:
A
Abstract:
To provide a super-junction semiconductor device which makes a depletion layer of an edge termination region easy to be spread without changing pitches of an active region and the edge termination region.SOLUTION: A super-junction semiconductor device comprises: a buffer layer 2 of a first conductivity type, which is provided on a front face of a semiconductor wafer 1 of the first conductivity type, with a lower impurity concentration than that of the semiconductor wafer 1; a drift layer 15 of the first conductivity type, which is provided on a top face of the buffer layer 2, with a lower impurity concentration than that of the buffer layer 2; and a first parallel pn structure 20 in which a first column region 3 of the first conductivity type and a second column region 4 of a second conductivity type provided in the drift layer 15 and reaching the buffer layer 2 are alternately disposed in a repeated manner in a direction in parallel with the front face. A termination structure part 40 includes a second parallel pn structure 20B in which a first column region 3 and a second column region 4 become shallower step by step toward a termination part. In the termination structure part 40, a bottom of the second column region 4 is provided in the second column region 4 inside of the drift layer 15.SELECTED DRAWING: Figure 1
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Inventors:
YAO NORIAKI
Application Number:
JP2022040859A
Publication Date:
September 29, 2023
Filing Date:
March 16, 2022
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12
Attorney, Agent or Firm:
Akinori Sakai