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Title:
SUPERCONDUCTING INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP05063554
Kind Code:
A
Abstract:

PURPOSE: To realize the superconducting integrated circuit forming a multi-input OR gate.

CONSTITUTION: Plural sets of multi-junction Josephson element (hereinafter 3J element) Jm comprising 3-junction SQUID and a supply resistor Rsm in pairs are connected as a ladder. A caption RL is a load resistor. While a bias current IB flows from a connecting point between a high potential power supply VDD and the supply resistor Rsm; when an input control signal flows into a loop from each of input terminals A-N of th 3J element Jm and no input control signal is in existence, the superconducting state by the 3J element Jm is kept and a logic '0' is outputted, and when the input control signal is in existence, the 3J element Jm is switched to a voltage existence state and a logic '1' is outputted, Even when the plural unit comprising the 3J element and the supply resistor, the single junction Josephson element and the supply resistor, and the resistors are connected as a ladder via the resistors, a multi-input OR gate is formed.


Inventors:
Suzuki, Hideo
Application Number:
JP1991000218977
Publication Date:
March 12, 1993
Filing Date:
August 29, 1991
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L39/22; H03K19/195; H01L39/22; H03K19/02; (IPC1-7): H01L39/22; H03K19/195



 
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