Title:
超格子メモリ及びクロスポイント型メモリ装置
Document Type and Number:
Japanese Patent JP6505619
Kind Code:
B2
Abstract:
According to one embodiment, a memory includes a resistance change layer includes a first chalcogenide layer, and a second chalcogenide layer having a composition different from that of the first chalcogenide layer which are stacked alternately, and the resistance change layer having a superlattice structure, and a semiconductor layer of a first conductivity type provided on a one of main surfaces of the resistance change layer.
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Inventors:
Yoshimi Kamada
Application Number:
JP2016022984A
Publication Date:
April 24, 2019
Filing Date:
February 09, 2016
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/8239; H01L27/105; H01L45/00
Domestic Patent References:
JP2014107528A | ||||
JP2007214565A | ||||
JP2011139057A | ||||
JP2014165427A |
Foreign References:
WO2010090128A1 |
Attorney, Agent or Firm:
Suzue International Patent Office