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Title:
SWITCH MATRIX CIRCUIT
Document Type and Number:
Japanese Patent JPS5533328
Kind Code:
A
Abstract:

PURPOSE: To obtain a low-cost encoder featuring a simple constitution and a reduced number of the component parts by forming the circuit with connection of each tansistor base to each of n pieces of the lateral axes.

CONSTITUTION: Diodes 41∼48 function as the encoder which produces the 4-bit digital signal from the signals sent from the collectors of PNP transistors Tr29∼ 32 via operation of keys 1∼16 and the signals sent from resistances 33∼40. When switch 1 is turned on, the base of Tr29 is grounded via resistance 37. As a result, base current i1 and collector current i2 flow, and "0, 0, 0, 0" are delivered from output terminals A, B, C and D each. Then with turn-on of switch 2, both base current i3 and collector current i2 flow with the output emerging at terminal D via diode 48, and "0, 0, 0, 1" are delivered to terminals A∼D. When switch 16 is turned on in the same way, current i4 and i5 flow with emergence of "1, 1, 1, 1" at terminals A∼D.


Inventors:
IWASAKI SHIYUNJI
Application Number:
JP10493278A
Publication Date:
March 08, 1980
Filing Date:
August 30, 1978
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M7/04; (IPC1-7): H03K13/252



 
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