PURPOSE: To realize a circuit with an equivalently large capacitance ratio with combination circuits with a small capacitance ratio by providing an input section being a 1/N circuit diving an input signal into 1/N formed by a switched capacitor circuit.
CONSTITUTION: A transmission gate 8 of a switch circuit constitutes a 1/N circuit. Capacitors 10, 11, 12 are connected to the transmission gate and a capacitor 9 connects to an integration circuit. The charge in the capacitor 12 is scattered to the capacitors 10, 11 and 12 of the switch circuit and the charge of the capacitor 9 is increased or decreased by the charge of the capacitor 10. Thus, the circuit is realized with the combination of the capacitances in which the capacitance ratio is less than 10.
ISHIDA HIROICHI
YASUI IKUO
| JPS56136019A | 1981-10-23 | |||
| JPS5883423A | 1983-05-19 | |||
| JPS5542424A | 1980-03-25 | |||
| JPS59117318A | 1984-07-06 |