PURPOSE: To improve the operation speed of a switched capacitor circuit to be used for an integrator, a filter, etc. by making said circuit execute one integrating operation every plural samples.

CONSTITUTION: Input voltage VIN is inputted to three capacitors C1∼C3 through switches SW7, SW9, SW11 to be controlled by clocks 7, 9, 11, applied to an integrated circuit consisting of an operational amplifier and a feedback capacitor C through switches SW8, SW10, SW11 to be controlled by clocks 8, 10, 11 and the output of the integrated circuit is fed back through switches SW5, SW6 to be controlled by clocks 5, 6. The titled circuit operates so as to integrate the samples of input voltages charged to two capacitors out of the capacitors C1∼C3 during two periods before t4∼t5 and t6∼t7 respectively. A capacitor C4 is also charged once every two samples. The shown circuit is improved so as to use integrating time longer than that of the ordinary technique. The factors of the capacitors C1∼C4 shows the rates to integration capacity C.