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Title:
SWITCHED CAPACITOR CIRCUIT
Document Type and Number:
Japanese Patent JPS61109313
Kind Code:
A
Abstract:

PURPOSE: To reduce the effect due to a parasitic capacitor of a switch by storing an electric charge of opposite polarity to a dummy switch so as to cancel the electric charge stored in a parasitic capacitor of a switch group at read of a signal of the capacitor mutually.

CONSTITUTION: A voltage VC(nT) at an output terminal C is expressed in equation I, where V(n-1/2)T is a signal voltage inputted to an input terminal A at a phase 1, -V(n-1/2)T is a signal voltage inputted to an input terminal B, and C33, C41, C42...C48 are capacitances of capacitors 31, 41, 42...48 respectively. The equation I is expressed in equation II when same type of switches are used for switches 21, 22...24, where voltages VC, V are respectively a function of time (t), a discrete function using the phase 2(1) corresponding to a period T and VC(nT) is a voltage appearing at the output terminal C at a point of time t=nT (where; n is an integral number), thereby decreasing the effect of the parasitic capacitor of the switches.


Inventors:
YAGI SHIZUO
MATSUMOTO SHUZO
Application Number:
JP23016884A
Publication Date:
May 27, 1986
Filing Date:
November 02, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
Akio Takahashi



 
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