PURPOSE: To eliminate a field-through voltage and to prevent the deterioration in the S/N by adding the 2nd switch comprising an MOS transistor (TR) the same size as that of an MOS TR constituting the 1st switch, and a resistor and the 3rd capacitor connected in parallel with the 2nd switch.

CONSTITUTION: The 1st switch M2 is provided, which consists of a differential amplifier A, the 1st capacitor C1 whose one terminal is connected to an inverting input of the differential amplifier A and whose the other terminal connects to an output of the differential amplifier A, the 2nd capacitor C2 whose one terminal is connected to the inverting input of the differential amplifier A and the MOS TR whose one terminal is connected to the inverting input of the differential amplifier A and whose the other terminal is connected to common. The 2nd switch M2 comprising an MOS TR having the same size as that of the MOS TR constituting the 1st switch M2 and whose one terminal is connected to a non-inverting input of the differential amplifier A and whose the other terminal is connected to common, the 3rd capacitor C3 connected in parallel with the 2nd switch M3 and the resistor R connected in parallel with the 2nd switch M3 are added to the switched capacitor as above.