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Patent Searching and Data


Title:
SWITCHED CAPACITOR CIRCUIT
Document Type and Number:
Japanese Patent JPS6126319
Kind Code:
A
Abstract:

PURPOSE: To cancel the effect of a parasitic capacitance by connecting an input signal source and a bias power supply and connecting an amplifier input terminal and an output terminal with plural capacitors alternately.

CONSTITUTION: A capacitor 32 and an amplifier 40 are connected by throwing switches 21R, 51R at a sampling period and an input signal 1 is charged to a capacitor 31 by turning on switches 21W, 51W. The capacitor 31 is connected in parallel between input/output terminal of the amplifier 40 by turning on switches 22R, 52R at the next sampling period and the input signal 1 of the preceding sampling period is stored in an output signal 80, and the new signal 1 is charged in the capacitor 32 by turning on the switches 22W, 52W. The capacitor 32 is connected to the amplifier 40 at the next sampling period, the input signal 1 of the preceding sampling period becomes the output signal 80, and the new input signal 1 is charged to the capacitor 31. The operations above are repeated.


Inventors:
MATSUI KAZUMASA
Application Number:
JP14682384A
Publication Date:
February 05, 1986
Filing Date:
July 17, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
Akio Takahashi