PURPOSE: To reduce power consumption and to attain miniaturization by applying connection/disconnection to plural integration capacitors to/from one operational amplifier in response to a clock signal so as to apply integration.

CONSTITUTION: The integration capacitors CB1, CB2 are connected via switches SW1, 2 respectively between an output terminal of the operational amplifier OP3 and an inverting input terminal. When a clock signal 1 is at an H level and the SW1 is turned on, the integration capacitor CB1 is connected to the amplifier OP3 to attain integration and the integrated value is stored in a capacitor C5. When a clock signal 2 is at an H level and the SW2 is turned on, the integration capacitor CB2 is connected to the amplifier OP3 to attain integration and the integrated value is outputted to an output terminal OUT via the SW2. Thus, only one operational amplifier is enough and a switched capacitor filter constituting a filter of the 2nd order or over is subject to circuit integration easily.