PURPOSE: To surely prevent production of noise caused in an output of a capacitor type low pass filter SCLPF by providing a delay circuit to a clock signal generating circuit and setting the delay of the delay circuit to a time when a current of other circuit is not fluctuated.
CONSTITUTION: When a basic clock signal m is 256kHz and the frequency of clock signals 1, inverse of 1 and 2 is 64kHz, capacitors 47, 48 and resistors 45, 46 are decided so that output timing signals ad, bd are retarded more than input timing signals a, b by nearly 100-900nsec. When no current of a voice synthesizer flows or the current is constant, switches 71-74 of an SC circuit 70 are turned off. Thus, no noise takes place in the output of the SCLPF 26 and a reproduced sound with high quality is obtained.
JP5554464 | Filter device |
WO/2002/071621 | HYBRID LOW-PASS SIGMA-DELTA MODULATOR |