To prevent attenuation of amplitude of a load capacity CMG voltage and to improve a rectangular wave characteristic while a jump from a CMG drive circuit of EM-CCD to an output signal of EM-CCD is reduced.
In a switching circuit, parallel connection of a ferrite bead and a diode is inserted between a logic buffer and gates of PchMOS and NchMOS, and the diode is connected in a direction where MOS is turned off. Conduction resistance between a drain and a source of PchMOS is 2 Ω or more, and a drain of PchMOS and a drain of NchMOS are connected by resistance of 1 Ω or more. The ferrite bead whose impedance in a switching fundamental frequency is lower than 1/2 of impedance of a capacitive load in the switching fundamental frequency is connected in series between the drain of PchMOS and the capacitive load.
NAKAMURA KAZUHIKO
KOGO KIYOTAKA
| JP2007124574A | 2007-05-17 | |||
| JP2010183241A | 2010-08-19 | |||
| JPH09214324A | 1997-08-15 | |||
| JP2009055563A | 2009-03-12 | |||
| JPH1187665A | 1999-03-30 | |||
| JP2010011451A | 2010-01-14 |