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Title:
SWITCHING NOISE PREVENTING METHOD FOR DIGITAL DELAY CIRCUIT
Document Type and Number:
Japanese Patent JPH0629750
Kind Code:
A
Abstract:

PURPOSE: To prevent the step of the output of a digital attenuator from being freely changed even in the case of an external factor by narrowing down the gain of the digital attenuator connected to a delay circuit at the time of changing the delay time and gradually releasing narrowing-down of the digital attenuator after wait of a maximum delay time.

CONSTITUTION: The input side of a microphone amplifier 11 is connected to a microphone terminal 10, and the output side of the microphone amplifier 11 is branched into two routes 12 and 13, and they are so connected that they joined in the part of a terminal 14. The route 13 is used for processed sounds to be delayed, and a VCA 17, a terminal 18, and a digital relay 19 which function as the attenuator are successively connected. A VCA 20 is connected as a feedback circuit between the input side and the output side of the digital relay 19. When the delay time is intentionally varied by the operation of the VCA 17, corresponding data is outputted, but unnecessary data output does not occur by the hysteresis characteristic of the VCA 17.


Inventors:
KOSUGA KOJI
SEKIGUCHI NORIYUKI
Application Number:
JP20202692A
Publication Date:
February 04, 1994
Filing Date:
July 06, 1992
Export Citation:
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Assignee:
ATSUDEN CORP
International Classes:
H03F1/00; G10K15/04; (IPC1-7): H03F1/00
Attorney, Agent or Firm:
Nobuo Kaida (2 outside)