To provide a synchronization circuit stably supplying two clocks more matched with each characteristic on requested.

The synchronization circuit 100 is provided with a 1st PLL circuit of which the voltage controlled oscillator 103 supplies an operating clock to a control section of a personal handy phone system(PHS) base station and with a 2nd PLL circuit whose voltage controlled oscillator 203 supplies a reference clock to a radio section of the personal handy phone system base station. The phase of the 1st PLL circuit is locked when a phase difference of an external clock received from a line network and a loop feedback signal of the PLL circuit is 90°. The 1st PLL circuit is provided with a 1st frequency divider 105 frequency-dividing an output of the voltage controlled oscillator 103 and a 2nd frequency divider 106 frequency-dividing an output of the 1st frequency divider 105. An output of the 1st frequency divider 105 is given to one of two inputs of a phase comparator 201 of the 2nd PLL circuit and a loop feedback signal of the PLL circuit is given to the other input.